MemSilicon taped out the first 1T4R RRAM chip, 1Gb on 28nm CMOS at 30Mb/mm² with sub-20ns reads. Sharing one transistor across four cells is how you get density and cost at once, and TSMC already has

What happened: MemSilicon announced it completed tape-out of "MountTai 2026," described as the first high-density, large-capacity 1T4R 1Gb RRAM chip based on the 1TnR route. Verification is now underway. Key numbers: 28nm CMOS process, 1T4R cell structure, 1Gb per chip, 30Mb/mm2 density, access latency under 20ns, tape-out dated October 12, 2026. Why it matters: The content states the chip marks a step from early research toward Gb-level productization of 1TnR, and that RRAM is on roadmaps at Samsung, TSMC, GlobalFoundries and Infineon.

First 1T4R 1Gb RRAM chip tape-out signals major memory density milestone.

First 1T4R 1Gb RRAM chip tape-out signals major memory density milestone. — impact context not separately stored; see What changed.